The present invention relates to an integrated circuit (IC) chip package and, more specifically, to a chip size package (CSP) for the IC chip.
FIG. 1 illustrates an IC chip package according to the prior art. The package 10 comprises generally a substrate 11, a chip 12, and a cover 13. The substrate 11 has a top-open receiving chamber 14 and a certain number of conductive pads 16 arranged in predetermined pattern at the bottom of the receiving chamber 14. The chip 12 is adhered to the central portion of the bottom of the receiving chamber 14, and electrically connected to the conductive pads 16 by bonding wires 17. The cover 13 closes the open side of the substrate 11 to protect the chip 12 against external impact or pollutant. The cover 13 shall be made of transparent material in case the chip 12 is an image sensor such as charge coupled device (CCD) or complementary metal oxide semiconductor (CMOS). FIG. 2 shows another design of IC chip package 20 according to the prior art. This design is similar to the IC chip package 10 shown in FIG. 1.
In the aforesaid package 10, the bottom of the receiving chamber 14 must receive the chip 12 and the conductive pads 16 of the substrate 11, and sufficient space should be provided between the chip 12 and the wall of the receiving chamber 14 for the movement of the wire bonding tool, and therefore, the area of the bottom of the receiving chamber 14 must be greater than the chip. Due to the aforesaid reasons, this package does not meet the requirements for light, thin, small, and short electronic products.
Further, since the substrate 11 is generally made of reinforced plastic or ceramic printed circuit board, it is complicated to process the receiving chamber in the substrate.
The primary objective of the present invention is to provide an IC chip package, which achieves the requirement for small dimensions.
It is another objective of the present invention to provide a simple structure of IC chip package, which is easy and inexpensive to manufacture.
The IC chip package of the present invention comprises a substrate, a chip, bonding wires, adhesive means, a cover and a spacer. The substrate has a top side, a bottom side, and a plurality of conductive pads arranged on the top side thereof. The chip is fixedly mounted on the top side of the substrate, which comprises a plurality of conductive pads. The bonding wires are respectively electrically connected between the conductive pads of the substrate and the conductive pads of the chip. The adhesive means is provided on the top side of the substrate around the border thereof. The cover is adapted for covering the substrate. The spacer is connected between the substrate and the cover to keep the cover from the substrate at a distance